| 发明名称 |
DIFFERENTIAL FLIP FLOP CIRCUIT |
| 摘要 |
<p>PROBLEM TO BE SOLVED: To realize an operation for reducing transmission delay time and suppressing power consumption in a differential flip flop circuit. SOLUTION: The slave side circuit SL of the differential flip flop circuit is constituted of a closed loop circuit formed of an inverter INV28 and a tristate inverter (INV29-30-31).</p> |
| 申请公布号 |
JP2001267889(A) |
申请公布日期 |
2001.09.28 |
| 申请号 |
JP20000073194 |
申请日期 |
2000.03.16 |
| 申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
TOUBO TETSURO;SATOMI KATSUJI |
| 分类号 |
H03K3/3562;(IPC1-7):H03K3/356 |
主分类号 |
H03K3/3562 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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