发明名称 Semiconductor integrated circuit and wiring method
摘要 In the semiconductor integrated circuit of the present invention, an n-channel MOS transistor and a p-channel MOS transistor, which are a plurality of circuit components that have been designed beforehand, are connected by means of wiring as a portion of a configuration content. Both a power supply potential wiring layer for supplying a power supply potential to circuit components and a ground potential wiring layer for supplying a ground potential to the circuit components are provided between the wiring used to connect together nodes inside the circuit components and the wiring between circuit components so as to generally cover the circuit components.
申请公布号 US2001025365(A1) 申请公布日期 2001.09.27
申请号 US20010760773 申请日期 2001.01.17
申请人 KUWABARA SUMIO 发明人 KUWABARA SUMIO
分类号 H01L21/822;H01L21/82;H01L23/528;H01L27/04;(IPC1-7):G06F9/455;G06F17/50;G06F9/45 主分类号 H01L21/822
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