发明名称 |
Signalverarbeitungssystem |
摘要 |
A CMOS integrated signal processing system for a sampling receiver includes a timing recovery circuit, wherein an on-chip numerically controlled oscillator is operative at periods T that are initially equal to the nominal baud rate of the signals controls a sinc interpolator receiving samples at the sampling rate. A loop filter is coupled to the sinc interpolator and to the numerically controlled oscillator. The arrangement is capable of handling various symbol rates. The system includes a circuit for carrier recovery, having a second on-chip numerically controlled oscillator, a digital derotation circuit responsive to the second numerically controlled oscillator, accepting an in phase component and a quadrature component of the sampled signals. An adaptive phase error estimation circuit is coupled in a feedback loop. <IMAGE> |
申请公布号 |
DE69613007(T2) |
申请公布日期 |
2001.09.27 |
申请号 |
DE1996613007T |
申请日期 |
1996.03.19 |
申请人 |
DISCOVISION ASSOCIATES, IRVINE |
发明人 |
CLAYDON, ANTHONY PETER JOHN;GAMMACK, RICHARD JOHN |
分类号 |
H03M13/41;H04L1/00;H04L7/02;H04L27/00;H04L27/22;H04L27/227;H04L27/38;H04N7/24;(IPC1-7):H04L27/233 |
主分类号 |
H03M13/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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