发明名称 |
Memory device with support for unaligned access |
摘要 |
An integrated memory comprises a plurality of data lines and a plurality of decoders being associated to each data line. Each data line can address a single memory cell or a plurality of memory cells. Also, each data line can be either a word line or a bit line of a memory. Each decoder generates an enable signal upon receiving of its associated address signal. A plurality of multiplexers having two inputs and an output associated to each data line are provided. The enable signal of each decoder is supplied to a first input of the associated multiplexer and to a second input of the multiplexer associated to the next higher addressed data line, and a control input for controlling said multiplexers.
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申请公布号 |
US2001024398(A1) |
申请公布日期 |
2001.09.27 |
申请号 |
US20010772497 |
申请日期 |
2001.01.29 |
申请人 |
INFINEON TECHNOLOGIES NORTH AMERICA CORP. |
发明人 |
OBERLAENDER KLAUS;RANDHAWA SABEEN;REZARD VINCENT;FLECK ROD G. |
分类号 |
G11C11/417;G11C7/10;G11C8/10;G11C8/12;G11C11/41;G11C11/418;(IPC1-7):G11C8/00 |
主分类号 |
G11C11/417 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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