摘要 |
The method involves synchronizing two program modules (MOD1,MOD2) using clock signals from their respective clock generators (GEN1,GEN2). The time difference (DIF1) between the clock signals (TS1,TS2) from respective clock generators is determined for adjusting the respective clock generator (GEN2) of one of the program modules (MOD2). The time difference is transferred from one program module (MOD1) to the other (MOD2) with other time information (COR1). Independent claims are also included for the following: (a) the first program module with first clock generator; (b) the second module with second clock generator; (c) the master program module for the first module; (d) the slave program module for the second module; (e) the telecommunication device provided with program module; (f) and the memory for storing the master and slave programs.
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