发明名称 Synchronization of program modules used in telecommunication, involves adjusting clock generator of second program module based on determined time difference between clock signals of first and second modules
摘要 The method involves synchronizing two program modules (MOD1,MOD2) using clock signals from their respective clock generators (GEN1,GEN2). The time difference (DIF1) between the clock signals (TS1,TS2) from respective clock generators is determined for adjusting the respective clock generator (GEN2) of one of the program modules (MOD2). The time difference is transferred from one program module (MOD1) to the other (MOD2) with other time information (COR1). Independent claims are also included for the following: (a) the first program module with first clock generator; (b) the second module with second clock generator; (c) the master program module for the first module; (d) the slave program module for the second module; (e) the telecommunication device provided with program module; (f) and the memory for storing the master and slave programs.
申请公布号 DE10013313(A1) 申请公布日期 2001.09.27
申请号 DE20001013313 申请日期 2000.03.20
申请人 ALCATEL, PARIS 发明人 DIVE, GEOFFREY
分类号 G06F1/12;H03L7/00;H04J3/06;H04L7/00;H04Q11/04;(IPC1-7):H04L7/08;H04L12/50 主分类号 G06F1/12
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