发明名称 |
Interface having plug and play function |
摘要 |
An interface circuit having a plug and play function executes a predetermined bus reset sequence in response to a bus reset. During execution, the circuit analyzes relevant data to determine whether an error has occurred. If so, it deletes the information and re-issues the bus reset to re-execute the bus reset sequence. If an error has not occurred, the interface notifies the host controller and supplies it with the relevant data. Because the host controller is notified only if the reset sequence is executed successfully, the application software and the device driver do not process errors. Thus the interface prevents a detected abnormality from affecting the network.
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申请公布号 |
US2001025330(A1) |
申请公布日期 |
2001.09.27 |
申请号 |
US20000734704 |
申请日期 |
2000.12.13 |
申请人 |
OI KENJI;TSUJIMOTO HIROYUKI |
发明人 |
OI KENJI;TSUJIMOTO HIROYUKI |
分类号 |
H04N5/765;H04N5/77;H04N5/775;(IPC1-7):G06F13/00;G06F13/38 |
主分类号 |
H04N5/765 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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