发明名称 TRACE BACK DEVICE OF VITERBI DECODER
摘要 PURPOSE: A trace back device of a viterbi decoder is provided, which reduces a delay in decoding time due to a trace back operation in the viterbi decoder to improve decoding rate. CONSTITUTION: A trace back device of a viterbi decoder includes a track back RAM(111) for storing survival path information with respect to the state of each of a plurality of input symbols outputted from an addition comparison selector, a minimum state calculator(112) for providing the minimum state of each input symbol as an initial address, and a memory(114) for storing a predetermined bits of decoded data while tracking back the input symbols outputted from the addition comparison selector when the selector in enabled. The device further has an address decoder(113) for performing trace back using the initial address and the survival path information, and a multiplexer(120) for multiplexing decoded data in the memory and the address decoder under the control of a decoder controller(140). The decoder controller controls decoded data of a predetermined rate set number to be stored in the address decoder after the predetermined bits of decoded data is stored in the memory, and controls the decoded data to be outputted from the memory and the address decoder when the decoded data reaches to the predetermined rate set number.
申请公布号 KR20010087935(A) 申请公布日期 2001.09.26
申请号 KR20000011816 申请日期 2000.03.09
申请人 LG INFORMATION & COMMUNICATIONS LTD. 发明人 KO, SEONG UK
分类号 H03M13/41;(IPC1-7):H03M13/41 主分类号 H03M13/41
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