发明名称 METHOD FOR FILTERING PLC INPUT CIRCUIT
摘要 PURPOSE: A method for filtering the PLC(Programmable Logic Controller) input circuit is provided to reduce the circuit size and production cost by filtering an input signal, and to safely receive the data with the minimum delay time by controlling the on/off delay time. CONSTITUTION: A PLC user configures the filtering value. A PLC CPU samples and stores an INS(Input Signal) per the fixed cycle. The PLC CPU compares the value of the sampling signal with the value of the filtering signal. As a result, if the value of the sampling signal is larger than the value of the filtering signal, the sampling value is checked as the data signal, and the data level is not changed. Otherwise, the sampling signal is checked as the chattering signal, and the data level is changed.
申请公布号 KR20010087901(A) 申请公布日期 2001.09.26
申请号 KR20000011758 申请日期 2000.03.09
申请人 LG IND. SYSTEMS CO., LTD. 发明人 CHA, DAL GWAN
分类号 G06F9/22;(IPC1-7):G06F9/22 主分类号 G06F9/22
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