发明名称 |
PLANARIZATION METHOD FOR SEMICONDUCTOR DEVICE |
摘要 |
PURPOSE: A planarization method for a semiconductor device is provided to reducing the quantity of spin-on-glass(SOG) flowing to a curved part, by forming a spacer on a sidewall of a lower metal interconnection to form the thin curved part. CONSTITUTION: Spacers(24) are formed on both sidewalls of the first metal interconnection(23a,23b) formed on a semiconductor substrate(20). The first interlayer dielectric(25) is covered on the resultant structure. Spin-on-glass(SOG)(28) is covered on the first interlayer dielectric. The SOG is etched back. The second interlayer dielectric(29) is deposited after the etching-back process.
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申请公布号 |
KR20010088091(A) |
申请公布日期 |
2001.09.26 |
申请号 |
KR20000012104 |
申请日期 |
2000.03.10 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KOO, TAE HYEON |
分类号 |
H01L21/31;(IPC1-7):H01L21/31 |
主分类号 |
H01L21/31 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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