发明名称 Cascode circuits in dual-V<sub>T</sub>, BiCMOS and DTMOS technologies
摘要 The various embodiments utilize cascode circuits in dual-threshold-voltage (dual-VT), BiCMOS and DTMOS technologies. The circuit topologies include cascode-connected transistors in the output branch of a current mirror and as a cascode amplifier. Such configurations are capable of both high output impedance and high output swing. The cascode circuits of the various embodiments are operable without separate gate-bias voltages for the cascode-connected transistors. The current mirrors can be used in circuits requiring a regulated current or other current mirroring applications. The current mirrors can further be used as active loads, such as an active load for an amplifier.
申请公布号 AU3822401(A) 申请公布日期 2001.09.24
申请号 AU20010038224 申请日期 2001.02.13
申请人 INTEL CORPORATION 发明人 SURINDER P. SINGH
分类号 G05F3/26 主分类号 G05F3/26
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