| 摘要 |
PROBLEM TO BE SOLVED: To provide a video signal processing unit that can enhance equivalent performance to that of a conventional video signal processing unit, while reducing the circuits in comparison with those of the conventional video signal processing unit. SOLUTION: The video signal processing unit A is provided with an adder 107, that generates and outputs a 2nd address value S106 having a prescribed phase difference with respect to a 1st address value S101 outputted from an address value output means 120, a selector 108 that selects the 1st address value S101 or the 2nd address value S106 to provide an output of a signal S107, a vertical synchronizing signal output means 123 that outputs a vertical synchronizing signal S104 to a selector 108, a ROM 109 that outputs 1st data corresponding to the 1st address value S101 or 2nd data corresponding to the 2nd address value S106 as a signal S108, a load hold flip flop 110 that retains the 1st data, a load hold flip-flop 111 that retains the 2nd data, and a hue adjustment means B that uses an output signal S109 of the load-hold flip flop 110 and an output signal S110 of the load hold flip-flop 111, to adjust a hue of a video signal.
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