发明名称 |
MOS-FET AMPLIFIER CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide a MOD-FET amplifier circuit capable of keeping the drain current of the amplifying MOS-FET of an input signal to be optimal so as to be free from change with lapse of time. SOLUTION: This MOS-FET amplifier circuit 200 amplifies an input signal by an amplifying MOS-FET 1 which has an operation point set by a drain current flowing between a source and a drain in the case of no-input. For purpose of this, the circuit 200 has a simulating MOS-FET 2 for simulating the operation of the MOS-FET 1 and a monitoring control circuit 3 which includes a simulating bias circuit where a constant drain current flows without regard to the lapse of time with respect to the MOS-FET 2, detects the gate-source voltage VGS2 of the MOS-FET 2 varied with the lapse of time, and gives gate- source voltage VGS1 for the MOS-FET 1 corresponding to the detected voltage to the gate of the MOS-FET 1 to operate the MOS-FET 1 optimally without change with lapse of time.
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申请公布号 |
JP2001257544(A) |
申请公布日期 |
2001.09.21 |
申请号 |
JP20000068906 |
申请日期 |
2000.03.13 |
申请人 |
HITACHI KOKUSAI ELECTRIC INC |
发明人 |
ISHIGAMI TAKESHI;HAYASE HIROO;TAKENAGA KOTARO |
分类号 |
H03F3/16;(IPC1-7):H03F3/16 |
主分类号 |
H03F3/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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