发明名称 SWITCHING MEANS, BISTABLE CIRCUIT AND MULTISTABLE CIRCUIT
摘要 PROBLEM TO BE SOLVED: To constitute a memory of reduced current consumption like a CMOS memory of a normally-on-type transistor, etc., in the bistable circuit of the second invention, e.g. SOLUTION: For example, as shown in the figure, a pull up means is formed with a drain grounded N channel type FET and a gate grounded P channel type FET, a pull down means is formed with the P channel type drain grounded FET and the N channel type gate grounded FET of, and the pull up means and the pull down means are connected in series between both DC power source terminals. Thus, when the pull up means is on, both of the FETs on the side of the pull down means is given gate reverse bias to be off and when the pull down means is on, both of the FETs on the side of the pull up means is given gate reverse bias to be off. Thus, current never flows in a stable state and current consumption is reduced. In this embodiment, a writing speed is improved because only junction type FETs are used (reference: patent No. 2853041).
申请公布号 JP2001257570(A) 申请公布日期 2001.09.21
申请号 JP20010032972 申请日期 2001.01.04
申请人 SUZUKI TOSHIYASU 发明人 SUZUKI TOSHIYASU
分类号 H03K3/356;H03K17/00;(IPC1-7):H03K17/00 主分类号 H03K3/356
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