发明名称 MEMORY MODULE
摘要 PROBLEM TO BE SOLVED: To provide a memory module in which an access time for bits of desired quantity is suppressed to the minimum in synchronous access by improving a memory module based on conventional technology. SOLUTION: A switch 10 is arranged so that the further a local data line 4 is relatively apart from an output amplifier 6, the shorter the maximum transmission time of a bit in the local data line 4 is for the other local data line 4 simultaneously required for synchronous memory access.
申请公布号 JP2001256780(A) 申请公布日期 2001.09.21
申请号 JP20010021717 申请日期 2001.01.30
申请人 INFINEON TECHNOLOGIES AG 发明人 SCHROEGMEIER PETER;DIETRICH STEFAN;PARTSCH TORSTEN;HEIN THOMAS;HEYNE PATRICK;MARX THILO
分类号 G11C11/407;G11C7/00;G11C7/12;G11C7/18;G11C8/00;G11C11/401;G11C11/409;H01L27/10;(IPC1-7):G11C11/407 主分类号 G11C11/407
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