发明名称 Signalverarbeitungsgerät
摘要 <p>An image compressing circuit (1) and a standby image compressing circuit (5) are connected parallel to each other, and a selector (3) selects either one of output signals from the image compressing circuit (1) and the standby image compressing circuit (5). A first delay circuit (2) is connected in a stage following the image compressing circuit (1), and a second delay circuit (2) is connected in a stage preceding the standby image compressing circuit (5). When the image compressing circuit (1) suffers a fault in its image compressing process, a CPU (6) indicates the fault to the standby image compressing circuit (5) and the selector (3). The standby image compressing circuit (5) then outputs a compressed signal, and the selector (3) selects the compressed signal outputted from the standby image compressing circuit (5). &lt;IMAGE&gt;</p>
申请公布号 DE69614427(D1) 申请公布日期 2001.09.20
申请号 DE1996614427 申请日期 1996.03.29
申请人 SONY CORP., TOKIO/TOKYO 发明人 KITAZATO, NAOHISA
分类号 H04N5/38;H03H17/08;H04N5/91;H04N5/92;H04N11/04;H04N19/00;H04N19/102;H04N19/107;H04N19/114;H04N19/146;H04N19/423;H04N19/46;H04N19/503;H04N19/51;H04N19/577;H04N19/61;H04N19/625;H04N19/70;H04N19/85;H04N19/91;(IPC1-7):H04N7/26;G06F11/20 主分类号 H04N5/38
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