发明名称 LOW POWER, NO DEADZONE PHASE FREQUENCY DETECTOR WITH CHARGE PUMP
摘要 <p>In a frequency synthesizer with a phase locked loop a charge pump (2) is present with an idle path (5-C, 6-C, 7, 8). The idle path (5-C, 6-C, 7, 8) is activated only shortly before an up or down pulse appears at an output (15, 16) of a phase frequency detector (1) and the idle path (5-C, 6-C, 7, 8) is disabled shortly after the disappearance of an up or down signal. Means (20) to generate a signal for controlling the enablement and disablement of the idle path (5-C, 6-C, 7, 8) may comprise a down-counter divider (30) or a zipper divider (35).</p>
申请公布号 WO2001069787(A1) 申请公布日期 2001.09.20
申请号 EP2001002419 申请日期 2001.03.05
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