| 摘要 |
An integrated circuit ferroelectric capacitor is fabricated by forming on an integrated circuit substrate, a lower electrode adjacent the substrate, an upper electrode remote from the substrate and a ferroelectric layer therebetween, and forming a first low temperature oxide layer on the upper electrode, opposite the ferroelectric layer. The low temperature oxide may be annealed in oxygen. A second low temperature oxide layer may be formed on the first low temperature oxide layer, opposite the upper electrode, and the second low temperature oxide layer may be annealed in oxygen. The first and second low temperature oxide layers preferably comprise at least one of Plasma Enhanced Tetraethoxysilane (PE-TEOS), undoped silicon glass (USG) and Electron Cyclotron Resonance oxide (ECR-OX). An electrical contact to the lower electrode may be formed between the steps of forming a first low temperature oxide layer and a second low temperature oxide layer. The low temperature oxide layers act as dielectric layers that apply tensile stress to the ferroelectric layer.
|
