发明名称 Method of forming transistors with self aligned damascene gate contact
摘要 A method of fabricating a transistor having shallow source and drain extensions utilizes a self-aligned contact. The drain extensions are provided through an opening between a contact area and the gate structure. A high-K gate dielectric material can be utilized. P-MOS and N-MOS transistors can be created according to the disclosed method.
申请公布号 US6291278(B1) 申请公布日期 2001.09.18
申请号 US19990303694 申请日期 1999.05.03
申请人 ADVANCED MICRO DEVICES, INC. 发明人 XIANG QI;BUYNOSKI MATTHEW S.;LIN MING-REN
分类号 H01L21/285;H01L21/336;H01L21/60;H01L21/8238;(IPC1-7):H01L21/336;H01L21/823 主分类号 H01L21/285
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