| 摘要 |
A semiconductor memory device improves driving capability of bit select transistors without increasing a memory cell array in size, wherein first and second sub-bit lines are elongated along the direction of a bit line and in the reverse direction and are connected to a main bit line through first and second bit select transistors each being independently controllable and the first and second bit select transistors are disposed in a deviated manner without being adjacent to each other with respect to the direction of the bit line.
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