发明名称 Dual-ported electronic random access memory that does not introduce additional wait states and that does not cause retransmission of data during shared access
摘要 A high-performance dual-ported shared memory that interconnects two 32-bit PCI buses with a RAM memory that provides an address space of 64-bit words. The high-performance dual-ported shared memory provides two independent channels for reading from, and writing to, the RAM memory. By interleaving 64-bit read and write operations directed to the RAM memory with 32-bit PCI bus data transfer operations, and by internally buffering data, the high-performance dual-ported shared memory can independently provide data access at PCI data transfer rates to both PCI buses without introducing wait states.
申请公布号 US6292873(B1) 申请公布日期 2001.09.18
申请号 US19980083957 申请日期 1998.05.22
申请人 HEWLETT-PACKARD COMPANY 发明人 KEAVENY THOMAS A.;CROSS DONALD M.
分类号 G06F5/06;G06F13/42;(IPC1-7):G06F13/00 主分类号 G06F5/06
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