| 摘要 |
A method of fabricating a via plug for self-aligned interconnects is provided. The method features initially forming a polysilicon buffer layer and a silicon oxide layer in sequence on an inter-polysilicon dielectric (IPD) layer, followed by forming a trench opening in the silicon oxide layer. The trench opening is then filled with a metal line. A patterned photoresist layer is formed on the silicon oxide layer to form a photoresist opening which exposes a part of the metal line. The exposed part of the metal line and a part of the polysilicon buffer layer are removed to expose a part of the IPD layer, followed by removing the photoresist layer and the silicon oxide layer. With the polysilicon buffer layer and the metal line serving as a mask, the exposed part of the IPD layer is removed to form a via opening. The via opening is then filled with a polysilicon layer which is formed on the polysilicon buffer layer and the metal line. The polysilicon layer, the polysilicon buffer layer, and the metal line are etched until the IPD layer is exposed to form a via plug.
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