| 摘要 |
A method is used to fully extract coupling coefficients of a flash memory cell by a GIDL manner. The flash memory cell is composed of a substrate, a drain region, source region, a control gate and a floating gate. The method keeps the source voltage Vs and the substrate voltage Vb fixed. The drain voltage Vd and the control gate voltage are varied. Then, measuring a GIDL current obtains a first coefficient ratio of the drain coupling coefficient ad to the gate coupling alphacg, that is, alphad/alphacg. Similarly, keeping the drain voltage Vd and the substrate voltage Vb fixed and varying the source voltage Vs and the control gate voltage Vcg, a second coefficient ratio of the source coupling coefficient alphas to the gate coupling coefficient alphacg, that is, alphas/alphacg. Similarly, keeping the drain voltage Vd and the source voltage Vs fixed and varying the control gate voltage Vcg and the substrate voltage Vb, a third coefficient ratio of the substrate coupling coefficient alphab to the gate coupling coefficient alphacg, that is, alphab/alphacg. The first coefficient ratio alphad/alphacg, the second coefficient ratio alphas/alphacg, and the third coefficient ratio alphab/alphacg incorporate a normalization equation of alphad+alphas+alphab+alphacg=1, so that all four coefficients alphad, alphas, alphab, and alphacg can be exactly solved.
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