Digital-to-analog converter with CMOS-compatible power-on reset circuit

摘要

A power-on reset circuit employs all-CMOS circuitry to initiate a reset signal when the circuit's power supply voltage is low, and terminate the signal in response to the supply voltage exceeding a reference voltage by at least the greater of the threshold voltages of PFET and NFET transistors employed in the circuit. A diode-connected bipolar transistor is implemented with an FET-compatible circuit structure to establish the reference voltage, which compensates for the possibility of fabrication tolerances.