| 摘要 |
The present invention relates to a circuit for protecting inputs and outputs on semiconductor devices. The protective circuit is particularly useful on high-speed inputs or outputs (such as in radio frequency applications where signal frequency is on the order of 100 MHz or greater and where it is necessary to minimize capacitive loading. Briefly, the present invention utilizes two FETs to shunt harmful electrostatic charges to a low impedance power bus and protect input and output circuit elements from damage or degradation. When a high voltage transient surge is detected, the drain-gate capacitance of one of the FETs couples the voltage to the gate electrode and biases one of the two transistors in the low impedance state so that the surge is absorbed without damage to the input or output circuit. Significantly, the capacitive loading of the protection circuit of the present invention is typically a fraction of a picoFarad and more particularly on the order of several hundred femtofarads.
|
