发明名称 |
Semiconductor circuit device having hierarchical power supply structure |
摘要 |
Inverters having the same output logic level in a stand-by mode are connected between buffer power supply and ground lines. Inverters having the same output logic level which is different from the above mentioned output logic level are connected between buffer power supply and ground lines. Power supply selectors connecting the buffer power supply line to a main or sub power supply line and connecting the buffer ground line to a main or sub ground line in accordance with an output signal from a latch circuit are provided. Thus, leakage current in a logic circuit in which a logic level is not determined is reduced in the stand-by mode.
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申请公布号 |
US6291869(B1) |
申请公布日期 |
2001.09.18 |
申请号 |
US19990307779 |
申请日期 |
1999.05.10 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
OOISHI TSUKASA |
分类号 |
G11C11/408;G11C5/14;G11C11/407;G11C16/06;H01L21/822;H01L27/04;H03K3/012;H03K3/356;H03K19/00;(IPC1-7):H01L29/00 |
主分类号 |
G11C11/408 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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