发明名称 RTL analysis tool
摘要 A method of determining circuit characteristics of an integrated circuit design defined by RTL code, said method comprising the steps of identifying hardware elements in the RTL code, determining key pins for said identified hardware elements, and extracting critical design structure from the RTL code. The hardware elements identified include flipflops, latches, tristate buffers, bidirectional buffers and memories. The critical design structures include design hierarchy and nets, including clock nets, multiply-driven nets, reset nets, and RAM write enable nets.
申请公布号 US6292931(B1) 申请公布日期 2001.09.18
申请号 US19980027520 申请日期 1998.02.20
申请人 LSI LOGIC CORPORATION 发明人 DUPENLOUP GUY
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
代理机构 代理人
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