发明名称
摘要 PROBLEM TO BE SOLVED: To make efficiently debuggable a user program without spoiling its execution environment and response performance, by specifying an interruption of a specified level and accepting the interruption selectively even during a supervisor interruption process. SOLUTION: A system register unit 3 sets whether a mask is reset or not, and an interruption level as to the interruption of specific level and a temporary register 14 latches the interruption level set by the system register 3 with a supervisor interruption(SVI) signal. A temporary register 13 latches the interruption level of an externally inputted interruption signal with a maskable interruption signal. Then, a comparing circuit 16 compares both temporary registers 14 and 13 with each other and outputs a coincidence signal and a mask control circuit masks an internal SVI signal in response to the coincidence signal. Even in a maskable interruption inhibited state by SVI execution, the interruption of the specific level is specified and the mask is reset to accept the interruption.
申请公布号 JP3209144(B2) 申请公布日期 2001.09.17
申请号 JP19970165339 申请日期 1997.06.06
申请人 发明人
分类号 G06F11/28;G06F9/46;G06F9/48;G06F11/22 主分类号 G06F11/28
代理机构 代理人
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