| 摘要 |
PROBLEM TO BE SOLVED: To make a test of a system LSI efficient and to shorten development period of the system LSI by enabling a production test of the entire system LSI constituted on a logical integrated circuit such as an FPGA as for a development support system of the system LSI. SOLUTION: This system is constituted so as to generate a logic of a scan path at a VHDL level based on definition information on the scan path (#8). Thus, a scan path for operation verification of the entire system LSI is constructed by inputting the definition information on the scan path to a register and a memory to be required for the operation verification of the system LSI, and the production test of the entire system LSI is performed via the scan paths (#13). |
