DATA TRANSMITTER AND METHOD

摘要

PROBLEM TO BE SOLVED: To provide a data transmitter that enhances an efficiency of packet data. SOLUTION: The data transmitter 100 is provided with an FIFO memory 140 that temporarily stores a packet block sent from an LSI 130 to a CPU 110, a data bus 101a through which the packet block is sent between the LSI 130 and the FIFO memory 140, data buses 101b and 101c through which the packet block is sent between the FIFO memory 140 and the CPU 110, a control information generating circuit 131 that generates a packet state signal and inputs the packet state signal depending on a position of each packet block to the FIFO memory 140, a selector 133 that replaces the most significant bit of the packet block received from the FIFO memory 140 with the corresponding packet state signal, and the CPU 110 that extracts the packet state signal from the packet block and detects the position of the packet block from the packet state signal.