| 摘要 |
<p>A data regular conversion unit (FL) (251) and a data reverse conversion unit (FL-1) (273) are arranged in point symmetry with respect to a nonlinear data conversion unit (220), and a data regular conversion unit (FL) (253) and a data reverse conversion unit (FL-1) (271) are arranged in point symmetry with respect to the nonlinear data conversion unit (220), thereby enabling a single circuit to function as both an encryption part (200) and a decryption part (500).</p> |
