发明名称 Integrated semiconductor memory with redundant units for memory cells
摘要 An integrated semiconductor memory has memory cells that are combined to form addressable normal units and to form at least one redundant unit for replacing one of the normal units. In addition, the semiconductor memory has an address bus to which an address can be applied, and a redundancy circuit that is connected to the address bus. The redundancy circuit is used to select the redundant unit. An input of a processing unit is connected to a connection of the address bus and also to a connection for a test signal, and the output of the processing unit is connected to an input of the redundancy circuit. The redundant unit can be tested before the repair information is programmed in the redundancy circuit. The circuit complexity required for this is comparatively low.
申请公布号 US2001021134(A1) 申请公布日期 2001.09.13
申请号 US20010780326 申请日期 2001.02.09
申请人 BOHM THOMAS;HONIGSCHMID HEINZ;LAMMERS STEFAN;MANYOKI ZOLTAN 发明人 BOHM THOMAS;HONIGSCHMID HEINZ;LAMMERS STEFAN;MANYOKI ZOLTAN
分类号 G01R31/28;G01R31/3185;G11C29/00;G11C29/04;G11C29/24;(IPC1-7):G11C7/00 主分类号 G01R31/28
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