发明名称 |
Pipelined analog-to-digital converter with relaxed inter-stage amplifier requirements |
摘要 |
This document describes a simple modification to the traditional pipelined analog-to-digital converter (ADC) architecture that reduces the signal swing of the inter-stage amplifier by a factor of two. This is a significant advantage when low power supply voltages limit the output range of operational amplifies. The modification requires no additional hardware and produces no additional power consumption.
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申请公布号 |
US6288663(B1) |
申请公布日期 |
2001.09.11 |
申请号 |
US19990371416 |
申请日期 |
1999.08.10 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
HESTER RICHARD KNIGHT;BRIGHT WILLIAM JOSEPH |
分类号 |
H03M1/06;H03M1/44;(IPC1-7):H03M1/12 |
主分类号 |
H03M1/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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