Semiconductor memory device with column gate and equalizer circuitry

摘要

A semiconductor memory device includes a semiconductor substrate and a plurality of element regions formed in the semiconductor, wherein at least one column gate and at least one equalizer are formed as a set in one element region of the plurality of element regions. In one embodiment, a set of a column gate and an equalizer share a diffusion layer with an adjacent set of a column gate and an equalizer. In a second embodiment, a gate electrode of the equalizer is disposed to divide a diffusion layer into six regions. In other embodiments, the equalizer is surrounded by at least a gate electrode of a column gate. In yet other embodiments, the sets of column gates and equalizers are disposed parallel to a bit line.