发明名称
摘要 PROBLEM TO BE SOLVED: To synchronize a plurality of probe means by performing the pattern- matching with a bit pattern line radio-received from a display means, and measuring an input signal by a sampling clock synchronized to the output. SOLUTION: A display means 50 transmits a predetermined bit pattern line to a probe means 52a. This is received and demodulated by an antenna 6a and a demodulating circuit 10a, an output signal 101 is outputted to a pattern matching circuit 12a to be pattern-matched with the bit pattern line, and an output signal 102 is outputted. A sampling clock generating circuit generates a sampling clock with the maximum output amplitude of the signal 102 as trigger. A control circuit 8a and an A/D converter 9a measure an input signal 100a on the basis of this clock and transmits the result to the means 50. The means 50 displays the measured waveform on a display circuit 2. A probe means 52b also operates in the same manner. According to this method, samplings of a plurality of means 52a, 52b can be synchronized.
申请公布号 JP3206639(B2) 申请公布日期 2001.09.10
申请号 JP19960112665 申请日期 1996.05.07
申请人 发明人
分类号 G08C15/06;G01R13/20;G08C17/00;(IPC1-7):G01R13/20 主分类号 G08C15/06
代理机构 代理人
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