| 摘要 |
PROBLEM TO BE SOLVED: To actualize a digital PLL circuit which operates with a reference clock of low frequency and can accurately make a phase comparison. SOLUTION: A digital VCO comprises a 1st n-bit register (n: integer larger than 2) operating with a reference clock and an n-bit adder 1 adding the output bus value of the 1st n-bit register 2 and an input value determining an oscillation frequency, and inputs the output bus value of the n-bit adder 1 to the 1st n-bit register 2; and the phase comparison output composed of successive binary mean values outputted by the 1st n-bit register 2 in the phase comparison timing is inputted to the n-bit adder 1 as the input value determining the oscillation frequency. |
