Polycrystalline silicon layer etching process used in production of emitter self-aligned with extrinsic base of bipolar transistor involves stopping plasma-etching on or in germanium or silicon-germanium intermediate layer, to form grooves

摘要

Ge and/or SiGe intermediate layer is interposed between a monocrystalline silicon substrate main surface and a polycrystalline silicon layer. The polycrystalline silicon layer is plasma-etched through a mask, and etching is stopped on or in the intermediate layer, to form at least one groove having a bottom comprising a Ge or and/or SiGe film, which is selectively recessed. Preferred Features: A thin layer of pure Ge of thickness less than 3 nm is formed in the polycrystalline layer at around 10 nm from the intermediate layer. The intermediate layer has a thickness of 2-40 nm. The Si/Ge alloy contains 30-80 atomic % Ge. Etching of the polycrystalline silicon layer is followed in situ by detection of completion of etching by optical measurement or analysis of the plasma. Optical measurement is carried out by reflectometry or ellipsometry. Optical analysis of the plasma comprises analysis of the etching plasma lines. Independent claims are given for processes based on the above for producing a polycrystalline silicon emitter self-aligned with an extrinsic base in simple or double polysilicon bipolar transistors.