发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE, AND SPEEDY SELECTION METHOD USED THEREFOR
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of checking performance of an LSI on an LSI tester level. SOLUTION: The input of a selector 1 is allowed to select a signal FB by giving a proper level to a signal EN. Two-phase scan clocks SC1, SC2 of F/F2, 4 are set so that F/F2, 4 are in the through state, and thereby a signal is enabled to pass in the through state from F/F2 to F/F4 in the circuit. Negative feedback of the output of F/F4 to F/F2 is executed through the signal FB, and thereby a critical path-ring oscillator formation executing self-oscillation by a critical path can be integrated. A logic in the ring is required to be an inversion logic. In the case of a test other than speedy selection or a normal operation, the proper level is given to the signal EN and switching is executed so that the selector 1 selects the input side, to thereby cut a negative-feedback path for executing negative feedback of the output of F/F4 to F/F2.
申请公布号 JP2001242223(A) 申请公布日期 2001.09.07
申请号 JP20000055204 申请日期 2000.03.01
申请人 NEC CORP 发明人 NAKANO TOSHIHIKO
分类号 G01R31/26;G01R31/28;H01L21/66;H03K3/03;(IPC1-7):G01R31/28 主分类号 G01R31/26
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