发明名称 SCALEABLE ARCHITECTURE FOR MULTIPLE-PORT, SYSTEM-ON-CHIP ADSL COMMUNICATIONS SYSTEMS
摘要 <p>A multi-port communications system (100) is described, which includes hardware based subsystems for performing both physical medium dependent operations and transport convergence operations on a data transmission. A software based subsystem performs other operations as needed. Both types of subsystems are shareable by the communications ports so as to reduce a total hardware requirement of a communications system (100). In addition, processing blocks within both subsystems are adapted to be multitasking, in that they can perform multiple operations for a receive/transmit task, or even pipeline arrangement with a common memory to further maximize the flexibility and configurability of a communications system (100).</p>
申请公布号 WO2001065774(A1) 申请公布日期 2001.09.07
申请号 US2001006809 申请日期 2001.03.01
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