| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory in which a defective cell can be efficiently tested during test operation. SOLUTION: A semiconductor memory performing late-write operation comprises a memory core circuit for storing data, a data latch circuit for storing data of write operation of the previous time, an address comparing circuit comparing an address of write operation of the previous time with an address of the present read operation and deciding matching/nonmatching of addresses, and a control circuit controlling operation so that data is read out from the memory core circuit when addresses are not matching at the time of normal read operation, data is read out from the data latch circuit when addresses are matching, and data is read out from the memory core circuit regardless of matching/nonmatching of addresses in the read operation during test operation.
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