发明名称 MEMORY CONTROLLER, FLASH MEMORY SYSTEM AND ACCESS METHOD TO FLASH MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a memory controller that requires a small storage capacity for address translation tables. SOLUTION: The memory controller has the address translation tables 27 that comprises scope 0 to scope 3 which store address translation data, and control tables 28 that showing that each of scope 0 to scope 3 corresponds to which of the area of a memory. The controller converts logical block addresses located in the host addresses into physical addresses on the basis of the address translation information stored in the selected scope that is selected by high order 5 bits of the host addresses.
申请公布号 JP2001243110(A) 申请公布日期 2001.09.07
申请号 JP20000187184 申请日期 2000.06.22
申请人 TDK CORP 发明人 TERASAKI YUKIO
分类号 G06F12/00;G06F12/02 主分类号 G06F12/00
代理机构 代理人
主权项
地址