| 摘要 |
PURPOSE: A non-volatile memory element of a semiconductor device and a manufacturing method thereof are provided to improve programing/erase operation characteristics by forming a floating gate having a surface area maximized to increase the coupling ratio between the floating gate and a control gate. CONSTITUTION: First and second insulating layers(24,250) having apertures exposing a portion of a semiconductor substrate(20) are formed on the substrate. A gate insulating layer(23) is formed on the substrate within the apertures. A pair of impurity doping areas(22) are formed on the substrate under the first insulating layer to correspond to each other about the gate insulating layer. A floating gate(26) having a plurality of grooves and burying the apertures which upper corners have stepwise profiles, upper part corresponding to the second insulating layer is narrow, and lower part corresponding to the first insulating layer is wide. A third insulating layer(27) covers an upper surface of the floating gate. A control gate(28) covers the third insulating layer.
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