发明名称 Buffer device with dual supply voltage for low supply voltage applications
摘要 An output buffer device having first and second supply voltage references, the first voltage reference being lower in value than the second voltage reference. The output buffer device includes first and second complementary MOS transistors, which transistors are connected in series together between one of the supply voltage references and a further voltage reference, have gate terminals connected together and to an input terminal of this buffer device, and have drain terminals connected together and to an output terminal of the buffer device. Advantageously, the first transistor is connected to the first supply voltage reference. Furthermore, the output buffer device comprises at least one additional drive MOS transistor of the same type as the first MOS transistor and placed between the second supply voltage reference and the output terminal of the buffer device.
申请公布号 US2001019260(A1) 申请公布日期 2001.09.06
申请号 US20000736984 申请日期 2000.12.13
申请人 DIMA VINCENZO;BEDARIDA LORENZO;GERACI ANTONINO;BARTOLI SIMONE 发明人 DIMA VINCENZO;BEDARIDA LORENZO;GERACI ANTONINO;BARTOLI SIMONE
分类号 G05F3/24;(IPC1-7):G05F1/40 主分类号 G05F3/24
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