发明名称 BURN-IN TEST METHOD OF NOR-TYPE MASK ROM
摘要 PURPOSE: A burn-in test method of a NOR-type mask ROM is provided to effectively press a stress to memory cells in a wafer level by controlling a line decoder, a column decoder, a column pass gate circuit through a burn-in circuit. CONSTITUTION: A NOR-type mask ROM apparatus includes a memory cell array(100). The memory cell array(100) is composed of a plurality of first bit lines(several bit lines) and a plurality of memory cells. A mask ROM(read only memory) apparatus includes a line decoder(120), a column decoder(140), and column pass gate circuit(160). The signal lines(BSL0,BSL1,GSL0,GSL1) and word lines(WL0-WLn) are connected to the line decoder(120). In normal operational mode, the line decoder(120) reponses to a line address inputted from an outer and selects one of the word lines. At the same time each selects one of the signal lines(BSL0,BSL1) and one of the signals(GSL0,GSL1). The selected word lines and signal lines are driven by a power source voltage. Other lines are driven by a ground voltage. The column decoder(140) responds to a column address inputted from an outer and generates column selecting signals. The NOR-type mask ROM apparatus more includes a burn-in circuit(180).
申请公布号 KR20010084505(A) 申请公布日期 2001.09.06
申请号 KR20000009593 申请日期 2000.02.26
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, BONG YONG;MIN, WON BAE
分类号 G01R31/3187;(IPC1-7):G01R31/318 主分类号 G01R31/3187
代理机构 代理人
主权项
地址