发明名称 Process for forming a buried cavity in a semiconductor material wafer
摘要 <p>The process comprises the steps of forming, on top of a semiconductor material wafer (10), a holed mask (16) having a lattice structure and comprising a plurality of openings (18) each having a substantially square shape and a side with an inclination of 45 DEG with respect to the flat (110) of the wafer; carrying out an anisotropic etch in TMAH of the wafer (10), using said holed mask (16), thus forming a cavity (20), the cross section of which has the shape of an upside-down isosceles trapezium; and carrying out a chemical vapour deposition (CVD) using TEOS, thus forming a TEOS layer (24) which completely closes the openings of the holed mask (16) and defines a diaphragm (26) overlying the cavity (20) and on which a suspended integrated structure can subsequently be manufactured. <IMAGE> <IMAGE> <IMAGE></p>
申请公布号 EP1130631(A1) 申请公布日期 2001.09.05
申请号 EP20000830148 申请日期 2000.02.29
申请人 STMICROELECTRONICS S.R.L. 发明人 ERRATICO, PIETRO;SACCHI, ENRICO;VILLA, FLAVIO;BARLOCCHI, GABRIELE;CORONA, PIETRO
分类号 H01L21/822;B81C1/00;G01N37/00;H01L21/306;H01L21/308;H01L21/314;H01L21/316;H01L27/04;(IPC1-7):H01L21/308 主分类号 H01L21/822
代理机构 代理人
主权项
地址