发明名称 Wafer level fabrication and assembly of chip scale packages
摘要 A method for producing integrated circuit devices comprises the steps of forming and packaging such devices at the wafer scale including forming a plurality of chip circuits with bond pads, adhesively fixing a plate of glass to the active surface of the wafer, slicing the wafer, applying a sealant layer to the backside of the wafer, forming contact holes through the upper glass plate, metallizing the glass plate and singulating the individual chips. Use of etchable glass for the package and palladium for metallization provides an advantageous construction method.
申请公布号 US6284573(B1) 申请公布日期 2001.09.04
申请号 US19990388033 申请日期 1999.09.01
申请人 MICRON TECHNOLOGY, INC. 发明人 FARNWORTH WARREN M.
分类号 H01L21/301;H01L21/48;H01L23/31;H01L23/498;(IPC1-7):H01L21/301 主分类号 H01L21/301
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