| 摘要 |
An adder tree is partitioned into two parts. One multiplexer provides a first bit group to the first part of the tree. A second multiplexer provides a second bit group to the second part of the tree. The two multiplexers provide the same bits groups to the respective parts in response to a first instruction, and provide different bit groups in response to a second instruction. Therefore, the first instruction allows for the single multiplication of the number represented by the first bit group by another number provided to collectively represented to both parts of the tree. The second instruction causes the multiplication of the first bit group by the third bit group in the first part of the adder tree, and causes another multiplication of the second bit group by the fourth bit group in the second part of the adder tree.
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