发明名称 Short-circuit current-limit circuit
摘要 A current-limit circuit and a method of limiting current supplied to a load through a power transistor utilize a control transistor that is selectively activated to a conducting state to limit the current conducted through the power transistor in response to a predefined condition. The predefined condition may be a short-circuit condition or an over-current condition. The configuration and operation of the control transistor are such that, when the control transistor is in a conducting state, the current conducted through the power transistor is limited by the structural ratio of the two transistors. However, during normal operating conditions when the control transistor is deactivated to a non-conducting state, the control transistor does not degrade the performance of the power transistor. In a first embodiment, the current-limit circuit is configured to provide protection from a short-circuit condition. In a second embodiment, the current-limit circuit is configured to provide protection from an over-current condition, in addition to protection from a short-circuit condition. In a preferred embodiment, the sense transistor and the power transistor are structurally integrated into a single semiconductor device having a honeycomb structure that allows the size of the sense transistor to be tuned.
申请公布号 US6285177(B1) 申请公布日期 2001.09.04
申请号 US20000566857 申请日期 2000.05.08
申请人 IMPALA LINEAR CORPORATION 发明人 MALLIKARJUNASWAMY SHEKAR;FLOYD BRIAN H.
分类号 G05F3/26;H03K17/082;(IPC1-7):G05F3/20;H02H3/18;H04J3/17 主分类号 G05F3/26
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