发明名称 Circuit and method for reducing parasitic bipolar effects during electrostatic discharges
摘要 A semiconductor device including a current source having a first node coupled to a terminal, and a second node for extracting a current in response to an electrostatic discharge (ESD) on the terminal. The semiconductor device further including a transistor having a control electrode, a first current electrode coupled to the terminal, and a second current electrode coupled to the second node of the current source, and including a resistive element coupled to a first voltage reference node and the second node of the current source. The transistor of the semiconductor device is biased by detecting a negative voltage event (such as an ESD) at a first current electrode of the transistor and biasing a second current electrode of the transistor in response to detecting the negative voltage event, wherein the biasing of the second current electrode is for preventing a forward biasing of an p-n junction associated with the transistor.
申请公布号 US6284616(B1) 申请公布日期 2001.09.04
申请号 US20000560501 申请日期 2000.04.27
申请人 MOTOROLA, INC. 发明人 SMITH JEREMY C.
分类号 H01L27/04;H01L21/822;H01L21/8234;H01L27/02;H01L27/088;H01L29/78;(IPC1-7):H01L21/331 主分类号 H01L27/04
代理机构 代理人
主权项
地址