发明名称 |
ERROR-CORRECTING DEVICE AND DECODER ENABLING FAST ERROR CORRECTION WITH REDUCED CIRCUIT SCALE |
摘要 |
PURPOSE: An error-correcting device is provided to achieve reduction in the time required for error check by shortening the access time to a memory device and performing the error check in parallel with error correction without increasing the circuit scale. CONSTITUTION: A data buffer(14) receives and temporarily stores data including a product code enabling error correction in first and second directions. An exclusive-OR operation circuit(9) uses an error amount detected by error correction in the first direction and data stored in a storage element(11) to calculate a first error check result. A PI direction error-checking circuit(3) according to the first error check result performs error check after error correction in the first direction. A PO direction partial error-checking circuit(8) and a PO direction aggregate error-checking circuit(6) use an error amount detected in error correction in the second direction and calculate a second error check result. The first and second error check results are used to generate a final error check result by an exclusive-OR operation circuit(5).
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申请公布号 |
KR20010083150(A) |
申请公布日期 |
2001.08.31 |
申请号 |
KR20010004290 |
申请日期 |
2001.01.30 |
申请人 |
SANYO ELECTRIC CO., LTD. |
发明人 |
ARISAKA TORU;NAGAI HIROKI;OHYAMA TATSUSHI;YAMAUCHI HIDEKI |
分类号 |
H03M13/00;H03M13/29;(IPC1-7):H03M13/00 |
主分类号 |
H03M13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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