| 摘要 |
PROBLEM TO BE SOLVED: To provide a video signal processing circuit where deterioration in the vertical resolution is reduced in the interpolation in a vertical direction of an interlace signal and further large scale integration LSI is facilitated be cause the processing circuit comprises digital circuits. SOLUTION: A multiplier (1st multiplier) 4 multiplies a coefficient (a) and an input video signal together and a multiplier (2nd multiplier) 5 multiplies a coefficient (1-a) and an output signal of a line memory 2 together. An adder 6 sums output signals from the multipliers 4, 5. A comparison discriminator 9 discriminates a correlation between the input video signal and a 1-field delay signal in an odd number field and a correlation between the input video signal and a (1 field + 1 line) delay signal in an even number field and controls a selector 10 to select an output signal from the line memory 2 when the correlation exists or to select an output signal from the adder 6 when there is no correlation.
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